mSAP Process

Introduction

Modified Semi-Added Process abbreviated as mSAP, which can be used on the core or build-up layers, pattern forming as follow: ย Laminating ultra thin copper foil with the dielectric material(such as prepreg) by pressing; Depositing with a very thin copper seed on the surface and in micro vias as a conductive layer; Laminating photosensitive dry film resist on the surface; forming the circuits pattern by the dry film using graphic transfer technology; and then metalizing with copper by filling the spaces of the dry film pattern; Removing copper seeds between metalizing copper patterns by flash-etching and firming the copper circuits finally. The mSAP process is improved from SAP process, which is easier than SAP as copper seed is much easier deposited on the copper foil than on the build-up film. But more etching is needed to removed copper seed layer and copper foil between patterns, which also more etching on metalizing copper patterns. The capability of fine line/space forming of mSAP is less than SAP.

The stack-up materials in the mSAP process usually have glass fiber reinforcement with low CTE, such as BT based or equivalent, which is suitable for thin and light devices. The process is as follows

Process schematic diagram

 

SAPใ€MSAP and Tenting are three kinds of mainly processes in PCB industry, and each has its own advantages and disadvantages. And the processes are constantly evolving and advancing. In a lot of different applications, the boundaries between the processes are blurred, and could be used in combination sometimes.QHIC has SAPใ€MSAP and Tenting process with well-rounded technology, and can provide high-quality low-cost solutions according to customers’ needs

Application Areas

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From advanced processes to specialty processes, we use our IDM vertical integration experience to help customers overcome design-process collaboration challenges.

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MPW (Multi-Project Wafer) Service: Small batch trial production to reduce customers' initial costs. Customized process development: Cooperate with customers to conduct DTCO (Design-Process Co-Optimization), customize design rules and process parameters.

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We support the joint solution of "wafer foundry + advanced packaging" (such as 3D IC, heterogeneous integration) to avoid the loss of multi-supplier collaboration. Unlike pure foundries, we verify the process stability through mass production of our own chips to reduce the risk of tape-out for you.

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